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1 explicitly parallel instruction computing
explicitly parallel instruction computing (EPIC) DAT Prozessorarchitektur f für parallele BefehlsabarbeitungEnglish-German dictionary of Electrical Engineering and Electronics > explicitly parallel instruction computing
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2 Explicitly Parallel Instruction Computing
(EPIC) < edp> ■ EPIC-Rechnen nEnglish-german technical dictionary > Explicitly Parallel Instruction Computing
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3 EPIC
English-German dictionary of Electrical Engineering and Electronics > EPIC
См. также в других словарях:
Explicitly parallel instruction computing — (EPIC) is a term coined in 1997 by the HP Intel alliance [cite web url = http://www.hpl.hp.com/techreports/1999/HPL 1999 111.pdf title = EPIC: An Architecture for Instruction Level Parallel Processors accessdate = 2008 05 08 last = Schlansker and … Wikipedia
Explicitly Parallel Instruction Computing — EPIC (Explicitly Parallel Instruction Computing, littéralement informatique à instruction explicitement parallèle) est un type d architecture de microprocesseurs (utilisé entre autres dans les DSP et par Intel pour les microprocesseurs Itanium et … Wikipédia en Français
Explicitly Parallel Instruction Computing — EPIC bezeichnet eine Eigenschaft einer Befehlssatzarchitektur (englisch Instruction Set Architecture, kurz ISA) und der Verarbeitungsstruktur einer Familie von Mikroprozessoren, z. B. Itanium. Bei der Programmierung von EPIC CPUs wird… … Deutsch Wikipedia
Instruction level parallelism — (ILP) is a measure of how many of the operations in a computer program can be performed simultaneously. Consider the following program: 1. e = a + b 2. f = c + d 3. g = e * fOperation 3 depends on the results of operations 1 and 2, so it cannot… … Wikipedia
Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… … Wikipedia
Instruction Set Architecture — Eine Befehlssatzarchitektur (engl. Instruction Set Architecture, kurz: ISA) ist – vereinfacht gesagt – die formale Spezifikation bestimmter Verhaltensweisen eines Prozessors aus Sicht seines Programmierers, auf die sich dieser bei der… … Deutsch Wikipedia
List of computing and IT abbreviations — This is a list of computing and IT acronyms and abbreviations. Contents: 0–9 A B C D E F G H I J K L M N O P Q R S T U V W X Y … Wikipedia
Very long instruction word — or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). A processor that executes every instruction one after the other (i.e. a non pipelined scalar architecture) may use processor resources… … Wikipedia
Parallel computing — Programming paradigms Agent oriented Automata based Component based Flow based Pipelined Concatenative Concurrent computing … Wikipedia
EPIC (informatique) — Explicitly Parallel Instruction Computing EPIC (Explicitly Parallel Instruction Computing, littéralement informatique à instruction explicitement parallèle) est un type d architecture de microprocesseurs (utilisé entre autres dans les DSP et par… … Wikipédia en Français
Itanium — 2 processor Produced From mid 2001 to present Common manufacturer(s) Intel Max. CPU c … Wikipedia